The essay shelf.
Samsung's HBM3E qualification, finally. The full timeline and what it means for NVIDIA's 2026 allocation strategy.
Samsung passed NVIDIA's HBM3E qualification in September 2025, eighteen months late and third in line. The delay cost it the Blackwell cycle, left SK Hynix with 70% of HBM4 allocation, and turned a technical milestone into a symbolic recovery rather than a commercial win.
↳ Energy · GridThe hyperscalers built nuclear deals nobody can finance. Here's what happens when reality hits.
Big Tech signed power purchase agreements for 9.8 gigawatts of small modular reactors. The largest investment announced covers 6.9 percent of one plant's construction cost, and the first electrons arrive no earlier than 2030.
↳ Policy · GeoCommerce's HBM3E export guidance is narrower than reported. The HBM4 ambiguity is the real story.
The December 2024 HBM rule contains three distinct exemptions and leaves HBM4 in regulatory limbo, but most coverage missed the fine print.
↳ AI · MemoryWhy every AI training run is now a packaging negotiation.
The bottleneck no longer measured in GPUs but in CoWoS slots. How TSMC quietly became the gatekeeper of the entire frontier-AI roadmap, and what the 2027 packaging map looks like.
↳ AI · MemoryCerebras WSE-4 is generally available. The benchmarks are out, and the numbers are real.
Cerebras began shipping its CS-4 wafer-scale accelerator in August 2026, claiming up to 30 times faster inference than GPU systems. All performance figures come from the vendor; no independent lab has verified the numbers.
↳ Cloud · InfraThe neoclouds are losing money slower than expected. CoreWeave's S-1, two years on.
CoreWeave's Q2 2026 results show operating losses narrowing faster than analysts expected, driven by depreciation accounting and contract structures that front-load capital costs while backlog grows to $104 billion.
↳ AI · MemoryWhy Samsung's HBM gap is closing.
Samsung's HBM3E yield climbed from below 60% to 80% in eight months, closing an 18-month qualification gap that had locked it out of NVIDIA's flagship accelerators. The question is whether third-vendor status translates to revenue or just a seat at the table.
↳ AI · MemoryMicron, year of the ramp. The "American HBM" trade is now structural, not speculative.
Micron's HBM production will hit 100,000 wafers per month by year-end, closing the capacity gap with Samsung and SK Hynix as all three vendors enter the first HBM generation where qualification is no longer the constraint.
↳ Silicon · PackagingInside TSMC's CoWoS expansion plan, and why HBM supply still won't catch up.
TSMC's CoWoS packaging capacity will reach 120,000 wafers per month by year-end 2026, but lead times now stretch beyond 12 months and the bottleneck won't clear until 2027.
↳ AI · MemoryPaged attention, two years later.
vLLM's paged attention cut GPU memory waste from 60% to under 4% and doubled throughput overnight. Two years of production use later, the technique reshaped inference economics but left new problems in its wake.
↳ AI · MemoryThe FP8 → INT4 quantization roadmap.
Inference frameworks are leapfrogging from FP8 to INT4 quantization to squeeze more tokens per watt and per dollar out of datacenter GPUs. The roadmap is messy, the accuracy costs are task-specific, and the real winner is whoever controls the memory bus.
↳ AI · MemoryHBM, explained without metaphors. Stacks, TSVs, and why it's so hard to make.
High-Bandwidth Memory uses the same DRAM cells as DDR, but everything else is different. The manufacturing problem is vertical stacking, thermal extraction, and routing thousands of wires through silicon.
↳ AI · MemoryThe HBM4 spec war: how a memory standard became an NVIDIA-customer fight.
JEDEC ratified HBM4 at 8 Gb/s in April 2025. NVIDIA then demanded 13 Gb/s, forcing all three suppliers to redesign and turning a standards process into a high-stakes negotiation over who controls AI memory roadmaps.